CISC (Complex Instruction Set Computer)

– Complex instruction set and multiple addressing modes
– Varying clock cycles per execution of each instruction
– Intel x86 & Motorola 68k series follow CISC philosophy
– A “Condition code” register (Flag register) which is set as a side-effect of most instructions. This register reflects whether the result of the last operation is less than, equal to, or greater than zero, and records if certain error conditions occur.

Advantages of CISC

– Easy programming, higher programming capability
– Complex instruction-decoding logic driven by the need for a single instruction to support multiple addressing modes
– A small number of general purpose registers. This is the direct result of having instructions which can operate directly on memory and the limited amount of chip space not dedicated to instruction decoding, execution, and micro code storage
– Several special purpose registers. Many CISC designs set aside special registers for the stack pointer, interrupt handling, and so on. This can simplify the hardware design somewhat, at the expense of making the instruction set more complex
– Because micro program instruction sets can be written to match the constructs of high-level languages, the compiler does not have to be as complicated

Disadvantages of CISC

– Many specialized instructions aren’t used frequently enough to justify their existence — approximately 20% of the available instructions are used in a typical program
– Low speed
– Complex instruction decoding hardware

RISC (Reduced Instruction Set Computer)

– The instruction set contains simple, basic instructions, from which more complex instructions can be composed
– Each instruction is the same length, so that it may be fetched in a single operation
– Most instructions complete in one machine cycle, which allows the processor to handle several instructions at the same time. This pipelining is a key technique used to speed up RISC machines

Advantages of RISC

Speed. Since a simplified instruction set allows for a pipelined, super scalar design RISC processors often achieve 2 to 4 times the performance of CISC processors using comparable semiconductor technology and the same clock rates
Simpler decoding hardware. Because the instruction set of a RISC processor is so simple, it uses up much less chip space; extra functions, such as memory management units or floating point arithmetic units, can also be placed on the same chip. Smaller chips allow a semiconductor manufacturer to place more parts on a single silicon wafer, which can lower the per-chip cost dramatically
Shorter design cycle. Since RISC processors are simpler than corresponding CISC processors, they can be designed more quickly, and can take advantage of other technological developments sooner than corresponding CISC designs, leading to greater leaps in performance between generations

Disadvantages of RISC

– Hazards of RISC

  • Code Quality: Instruction Scheduling
  • Debugging
  • Code Expansion
  • System Design

– Less programming flexibility