Q. How does a MOSFET works?
Q. Explain various types of digital design technologies ( CMOS, TTL etc).
Q. What is threshold voltage?
Q. What is noise margin?
Q. What is channel-length modulation?
Q. What is doping?
Q. What is body effect?
Q. Give various factors on which threshold voltage depends.
Q. Explain nMOS and pMOS.
Q. Explain various MOSFET capacitances and give their significance.
Q. What is early effect?
Q. Compare enhancement and depletion mode devices.
Q. Which is fastest among the following technologies: CMOS, BiCMOS, TTL, ECL?

Q. Draw the cross section of nMOS or pMOS.
Q. Draw the symbols of nMOS or pMOS.
Q. What should be done to the size of a pMOS transistor inorder to increase its threshold voltage?
Q. What is setup time and hold time?
Q. Is it possible to have both setup and hold time violations simultaneously?
Q. What is the total number of Boolean expressions we can write with 2 variables?
Q. Define latency?
Q. Does frequency of operation for a system depend on hold time?
Q. Is the hold time included in clock to q delay?
Q. What are the applications of Asynchronous counters and synchronous counters?
Q. Define glitch in digital circuits?
Q. Draw the internal circuit for a Decoder?
Q. What are the applications of decoders?
Q. Draw the internal circuit of an encoder?
Q. What are the applications of Priority encoder?
Q. Design a 3:8 decoder using 2:4 decoders
Q. Which takes more area? Ripple counters or Synchronous counters?
Q. In a 3 bit binary counter what is the frequency of MSB if the frequency of operation is f Hz?
Q. Implement all 2input logic gates using 2:1 mux
Q. Implement a 4:1 mux using 2:1 mux?
Q. How many 2:1 mux are required in order to construct a 33:1 mux?
Q. What is the difference between RS and JK flip flop?
Q. What is race around condition? How can it be avoided?
Q. What is a hazard?
Q. Explain why hazards occur in digital circuits?
Q. Explain static-0 and static-1 hazards?
Q. Name different types of adders?
Q. What are universal gates and why are they called so?
Q. Implement XOR using NAND gates?
Q. Which adder do you prefer when optimizing for speed? Justify?
Q. Question on the design of MOD counters.
Q. What is the difference between Johnson counter and ring counter? (in terms of number of states)
Q. Define Fan in and Fan out of a digital circuit?
Q. Name different logic families?
Q. Which is faster among the all logic families? State the reason?
Q. What is overflow?
Q. What is the significance of grey code?
Q. Convert 110101010001111(2) to Octal?
Q. Implement AB+CD+EF using minimum number of 2i/p nand gates?
Q. What is Dynamic CMOS logic?
Q. What is ground bounce?
Q. Why active low signals are used as enables in all the ICs?
Q. Which is more power consuming SRAM or DRAM?
Q. Draw the 6 transistor model of a SRAM?
Q. What is the disadvantage of DRAM over SRAM?
Q. What is the difference between meta stability, hazard and ?
Q. What do you mean by negative setup and hold time?
Q. In a SRAM layout, which metal layers would you prefer for Word Lines and Bit Lines? Why?
Q. What’s the critical path in a SRAM?
Q. Draw a 6-T SRAM Cell and explain the read and write operations?
Q. For CMOS logic, give the various techniques you know to minimize power consumption?
Q. What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus
Q. What is LATCHUP problem in CMOS circuits?
Q. What happens when we reduce the gate oxide thickness in a MOS transistor?
Q. How we can overcome latch up problem in CMOS circuits?
Q. What are the advantages of BICMOS circuits over CMOS?
Q. It is ideal to have infinite impedance at the input of a transistor. State the reason?
Q. Given a Boolean function you need to draw the CMOS logic circuit for that.
Q. What is pass transistor logic?
Q. Implement xor gate with 4 pass transistors?
Q. What are the advantages and disadvantages of Pseudo NMOS logic?
Q. What is Pseudo NMOS logic? Why is it not preferred?
Q. What is the difference between PAL and PLA?
Q. Which one is faster Carry look ahead or ripple carry adder?
Q. Xor can be used as_________
a)buffer b)inverter c)parity generator d)all the above
Q. A decoder can be designed from two ________ one _______gate.
a) and, not b) not, and c) or, and d) or, not
Q. Which FF solves race around condition?
Q. A simple FM demodulator is a)BJT b)PN diode c)FET d)none of the above
Q. A m bit number is given how will you know whether it is even or odd?
Q. How will you find whether the given m bit number is divisible by 8?
Q. How do you convert a DFF to TFF?
Q. How do you represent poles and zeros for a digital system?
a) Z Transform b) Fourier transform c)Laplace transform d)We wont represent Poles and zeros
Q. Given an xor gate with one input y which is an active low, another i/p is connected to X which is an active high between x and the i/p two inverters are connected. Given input freq of both is 50 hz what will be the o/p freq?
Q. Give two ways of converting a two input NAND gate to an inverter
Q. How do you detect if two 8-bit signals are same?
Q. How do you detect a sequence of “1101” arriving serially from a signal line?
Q. Draw the stick diagram of a NOR gate. Optimize it