Electrostatic discharge (ESD) Design and SynthesisElectrostatic discharge (ESD) continues to impact semiconductor components and systems as technologies scale from micro- to nano-electronics. Wiley publishers recently released a new textbook titled “ESD Design and Synthesis”. This book studies electrical overstress, ESD, and latchup from a whole-chip ESD design synthesis approach. It provides a clear insight into the integration of ESD protection networks from a generalist perspective, followed by examples in specific technologies, circuits, and chips. Uniquely both the semiconductor chip integration issues and floorplanning of ESD networks are covered from a ‘top-down’ design approach.

ESD Design and Synthesis textbook also covers the following topics:

  • Integration of cores, power bussing, and signal pins in DRAM, SRAM, CMOS image processing chips, microprocessors, analog products, RF components and how the integration influences ESD design and integration
  • Architecturing of mixed voltage, mixed signal, to RF design for ESD analysis
  • Floorplanning for peripheral and core I/O designs, and the implications on ESD and latchup
  • Guard ring integration for both a ‘bottom-up’ and ‘top-down’ methodology addressing I/O guard rings, ESD guard rings, I/O to I/O, and I/O to core
  • Classification of ESD power clamps and ESD signal pin circuitry, and how to make the correct choice for a given semiconductor chip
  • Examples of ESD design for the state-of-the-art technologies discussed, including CMOS, BiCMOS, silicon on insulator (SOI), bipolar technology, high voltage CMOS (HVCMOS), RF CMOS, and smart power
  • Practical methods for the understanding of ESD circuit power distribution, ground rule development, internal bus distribution, current path analysis, quality metrics