Altera’s Stratix V FPGA supports variable-precision DSP block architecture for easy design and development of DSP algorithms and applications in FPGA. Altera’s variable-precision DSP block architecture won the DesignCon 2011 DesignVision Award in the Semiconductor and IC category for its ability to enable high-precision, high-performance digital signal processing in FPGAs that efficiently supports many different precision levels. This unique architecture is implemented within Altera’s portfolio of 28-nm FPGAs to increase system performance, reduce power consumption and reduce architecture constraints for DSP algorithm designers.

High-performance digital signal processing (DSP) applications increasingly need higher precision, in the greater than 18-bit range. This demand is in a variety of applications, including:

  • Radar systems that need to support higher resolution and multi-antenna architectures.
  • Wireless basestation channel cards for multiple-input multiple-output (MIMO) processing.
  • Medical and test applications for very high-precision filtering and fast Fourier transforms (FFTs).

To meet demands for higher precision digital signal processing, Altera developed the industry’s first variable-precision DSP block. This integrated block, part of the Stratix V FPGA architecture, allows each block to be configured at compile time in an 18-bit mode or in a high-precision mode.

With the variable-precision DSP block, the Stratix V FPGA can support on a block-by-block basis various precisions ranging from 9-bit x 9-bit up to single-precision floating-point (mantissa multiplication) within a single DSP block. This frees you from FPGA architecture restrictions, allowing you to use the optimum precision at each stage of the DSP datapath. You’ll also benefit from increased system performance, reduced power consumption, and reduced architectural constraints.