In Digital System Board Design, It is suggested to Tie high or low all the CMOS floating and unused inputs. Leaving inputs floating causes gate puncture (gates goes to intermediate logic creating a low resistance path to the ground thereby damaging the device). It is recommended to tie the TTL unused inputs to logic low or high. The value of the pull-up/pull-down resistor should be chosen such that the ICT’s sink/source requirements are met. Caution: However in some cases vendor recommends leaving some unused pins floating. In that case, the unused pin should not be tied to high or low. Refer to vendor datasheet.

Pull-Up & Pull-Down Resistors Calculations

Following calculation of pull-up resistor assumes that no internal pull-down resistor is present within the device.
Rpu < [Vcc (min) - Vih min] / Ii max.

Following calculation of pull-down resistor assumes that no internal pull-up resistor is present within the device.
Rpd < [VIL max] / Ii max.

Example:- 74LVC08 gate from Philips [Ref-4] has the following specifications:
Vcc = 3.0V to 3.6V (supply tolerance on the board)
Ii max = +/- 5mA
Vih min = 2.0V
Vil max = 0.8V

Pull-Up Resistor Rpu < [3.0 – 2.0]V / 5mA --> Rpu < 200 Kohm Pull-Down Resistor Rpd < 0.8V / 5mA --> Rpd < 160 Kohm

Pull-up and Pull-down Resistors for Unused Differential Inputs

Pull-up and pull-down resistors are needed for unused differential logic input pins. The pull-up and pulldown resistors need to be provided by taking into consideration the presence of resistors internal to the chip. The external pull-up and pull-down resistors, if provided, should present the logic level for the inactive state at the differential inputs.

Some differential logic chips provide differential 100 ohm termination across the pair of differential signals. If the pins for the differential signals are meant for an active high signal, the external pull-up and pull-down resistors should present a logic low level, when the pins are not used.

For a low logic level, the P pin of the differential signal should have a pull-down to the negative supply, whereas the N pin should have a pull-up to the positive supply. The pull-up resistor on the N pin should ensure that the voltage on the N pin is within the VIH range. The pull-down resistor on the P pin should ensure that the voltage on the P pin is within the VIL range.